JRC-1, or Josh’s Retro Computer 1, is the first in the new JRC series of SBCs. The goal of the JRC project is to produce a powerful 65816-based system capable of playing the types of games that were prevalent in the mid to late 1980s. Each successive computer in the JRC line will move the design closer towards that goal, by adding small but incremental improvements to the basic design.
In designing JRC-1, my primary goal was to create a foundation on which future projects could be built. To this end the base board provides only the most basic features: RAM, ROM, serial ports, and an SPI port. Expansion slots and a user I/O port are provided to allow for incremental functionality to be added.
The other design goal that guided me with JRC-1 was to design something that, aesthetically, appears as if it could have originated in the 1980s. Thus all components are through-hole, and the entire design is based on 5V logic.
- 65C816 CPU, initially at 4 MHz with plans to increase down the road
- 1 MB of RAM
- 256 KB of ROM, capable of in-system reprogramming
- CPLD glue logic
- 65C22 VIAs, all pins brought out to user port
- SPI controller
- Two DB-9 serial ports
- SD card connector
- Three expansion connectors
- User I/O port
- JTAG port for in-circuit reprogramming of the CPLDs
- RESET and NMI switches
- Barrel jack for +5V DC power
- Power LED
As of December 23rd, 2021 a first build of the project is up and running stable at 4 MHz. Barring any serious design issues that may crop up the hardware design phase is complete, and my attention is now focused on the BIOS and JR/OS operating system.